Optoelectronic co-packaging is a technical field that combines optics and electronics. Photonic devices utilize light to transmit information, perform calculations, or conduct high-precision measurements. One of the main advantages of photons is their ability to process a large amount of data at a very high speed. This makes them ideal for telecommunications and information processing applications that require the fast and efficient transmission of large amounts of data. Photonic devices also have high energy efficiency and low losses, which is a significant advantage in applications where low energy consumption is emphasized.
In high-performance applications, thermal crosstalk between electronic and photonic chips, as well as environmental temperature fluctuations, can have a negative impact on the performance of photonic chips. Therefore, thermal management plays a vital role in optoelectronic co-packaging.
Glass is considered a suitable platform for next-generation optoelectronic co-packaging due to its low thermal conductivity, which can minimize unnecessary heat transfer between electronic and photonic components. This property of glass helps to achieve proper thermal isolation between the chip and the chip-fiber interface. However, this also brings another challenge in thermal management – the heat generated by electronic chips must be dissipated within the glass package to eliminate its impact on the temperature-sensitive photonic chips.
The general approach is to add through-glass vias (TGVs) in the glass substrate to achieve effective heat dissipation of electronic chips. Recently, Parnika Gupta and others from University College Cork in Ireland have proposed another innovative thermal management strategy, which is to integrate micro-thermoelectric coolers (micro-TECs) at the bottom of the chip to provide active temperature control.
This technology, known as “Substrate Integrated Micro-Thermoelectric Coolers (SimTEC)” by researchers, uses glass through-vias (TGVs) filled with electroplated copper and thermoelectric materials as the pillars of the thermoelectric cooler (TEC). It can not only conduct targeted and precise thermal management of photonic chips, enhance the thermal connectivity with the surface of the photonic chip (bonded face down to the substrate), but also maintain the compact form factor of the glass package. By transitioning from bonding based on micro-bumps and underfill to copper-copper (Cu-Cu) hybrid bonding, the thermal resistance at the interface between the chip surface and the cold-side TEC can be further reduced.
